Riscv-V/64 assembly kernel

[Bill Allombert <Bill.Allombert@math.u-bordeaux.fr>]

Dear PARI developers,

I have added a assembly level-0 kernel for Risc-V/64.
I suppose it should work with Risc-V/32 but I do not have a system to test it.

Unfortunately, it seems the Risc-V/64 ISA was not designed with multiprecision in
mind (it seems a copycat of the 30-years-old DEC alpha ISA).

Cheers,
Bill.